Sr Verification Engineer

- 5+ years of digital functional verification experience on complex SoC or mixed-signal ASIC product development

- Expertise with tools and methodologies used in digital or mixed-signal design and verification

- Hands on experience of Digital-Centric Mixed-Signal (DMS) verification is preferred

- Proven teamwork and leadership skills

- Excellent analytical and problem solving skills

- Excellent oral and written communication skills

- Able to travel internationally (to United States and throughout Asia)

Technical Requirements

-               Conversant with some of the programmable languages such as Verilog, SystemVerilog, e, Perl/Python/Tcl scripts, Makefile and C++

-               Profound with OOP and software programming

-               Experienced with environment and flow build up with OVM/UVM/VMM, Metric-Driven verification methodology

-               Experienced with Assertion like SVA or PSL etc.

-               Experienced with EDA tools such as VCS or NC-Sim/irun or Specman etc. Be good at tool usage exploration

-               Conversant with Verilog-AMS/Verilog-A and Analog Behavior Modeling would be a plus

-               Understanding of silicon process technologies (CMOS and Bipolar) and device physics would be a plus.

Education/Certifications:

Required Degree: BS

Preferred Degree: MS

Preferred Major: Electrical Engineering or related discipline


Please send your resume to hr@mncconsulting.cn, and make sure to mention the position you apply for within the email Subject Title. Our recruitment consultants will contact you directly for more details if you are in the shortlist.